82503 Datasheet, PDF (30/45 Pages) Intel Corporation – DUAL SERIAL TRANSCEIVER (DST)

82503
RECEIVE TIMINGS (Fujitsu)
Symbol
Parameter
Min
Typ
Max
Units
t₈₀
RCKN Cycle Time
96
100
ns
t₈₁
RCKN High Low Time⁽²¹⁾
35
50
60
ns
t₈₂
RCKN Rise Fall Time at 20% to 80%
5
ns
t₈₃
v RXD Setup Time from RCKN ⁽²¹⁾
20
ns
t₈₄
v RXD Hold Time from RCKN ⁽²¹⁾
10
ns
t₈₅
v XCD Assertion Hold Time from RCKN ⁽²¹⁾
0
10
ns
t₈₆
v XCD Deassertion Hold Time from RCKN ⁽²¹⁾
120
ns
t₈₇
v XCD Deassertion Setup Time from RCKN ⁽²¹⁾
80
130
ns
t₈₈
u RCKN Delay from XCD ⁽²¹⁾
1400
ns
NOTE
21 Timing measurements are referenced at 1 5V
Figure 24 Receive Timings (Fujitsu Start of Frame)
290421 – 23
Figure 25 Receive Timings (Fujitsu End of Frame)
290421 – 24
30