82503 Datasheet, PDF (19/45 Pages) Intel Corporation – DUAL SERIAL TRANSCEIVER (DST)

82503
Make power supply and ground traces as thick as
possible This will reduce high-frequency cross cou-
pling caused by the inductance of thin traces
Connect logic and chassis ground together
Separate and decouple all of the analog and digital
power supply lines
Close signal paths to ground as close as possible to
their sources to avoid ground loops and noise cross
coupling
Use high-loss magnetic beads on power supply dis-
tribution lines
Crystal
The crystal should be adjacent to the 82503 and
trace lengths should be as short as possible The X1
and X2 traces should be symmetrical
82503 Analog Differential Signals
The differential signals from the 82503 to the trans-
formers analog front end and the connectors
should be symmetrical for each pair and as short as
possible Differential signal layout should be per-
formed to a characteristic impedance of 78X (for
AUI) or 100X (for TPE)
As a general rule the trace widths should be one to
three times the distance between the PCB layers to
eliminate excessive trace inductance
The differential signals should also be isolated from
the high speed logic signals on the same layer as
well as on any sublayers of the PCB
Group each of the circuits together but keep them
separate from each other Separate their grounds
In layout the circuitry from the connectors to the
filter network should have the ground plane re-
moved from beneath it This will prevent ground
noise from being induced into the analog front end
All trace bends should not exceed 45 degrees
6 0 PACKAGE THERMAL
SPECIFICATIONS
The 82503 Dual Serial Transceiver is specified for
operation when case temperature (T_C) is within the
range of 0 C to ^a85 C The case temperature can
be measured in any environment to determine if the
82503 is within the specified operating range The
case temperature should be measured at the center
of the top surface opposite the pins
The acceptable operating ambient temperature (T_A)
is guaranteed as long as T_C is not violated The am-
bient temperature can be calculated from the i_ja
and i_jc from the following equations
T_J e T_C a P c i_jc
T_J e T_A a P c i_ja
T_A e T_C b P c (i_ja b i_jc)
Values for i_ja and i_jc are given in Table 4 for the 44-
lead PLCC and 44-lead QFP packages Various val-
ues for i_ja at different airflows Table 5 shows the
maximum T_A allowable (without exceeding T_C) at
various airflows
Table 4 Thermal Resistance
( C Watt) i_jc and i_ja
i_ja vs Airflow ft min (m s)
Package i_jc 0 200 400 600 800 1000
(0) (1 01) (2 03) (3 04) (4 06) (5 07)
44-Lead 19 57 48 43 41 39 37
PLCC
44-Lead 26 98 94 78 70 66 64
QFP
Table 5 Maximum T_A at Various Airflows
i_ja vs Airflow ft min (m s)
Package 0 200 400 600 800 1000
(0) (1 01) (2 03) (3 04) (4 06) (5 07)
44-Lead 66 71 73 74 75 76
PLCC
44-Lead 49 51 59 63 65 66
QFP
19