82503 Datasheet, PDF (15/45 Pages) Intel Corporation – DUAL SERIAL TRANSCEIVER (DST)

82503
Figure 7 Polarity Fault State Diagram
290421 – 6
polarity error due to crossed wires If Pin 4 of the
82503 is high and the TPE receive pins are re-
versed the 82503 will correct the error by reversing
the signals internally and turn POLED on (low) to
indicate that the fault has been detected and cor-
rected The polarity correction function is defeatable
by driving the APOL XSQ input low However the
polarity fault will continue to be indicated on the
POLED
3 12 Controller Interface
Connecting the 82503 to one of the Intel Ethernet
controllers (82586 82590 82593 82596) requires
no additional components Simply drive CS0 and
CS1 both low and connect TxC TxD RTS RxC
RxD CRS CDT and LPBK to the corresponding
controller pins
The 82503 also works with other Ethernet control-
lers without additional components including the
National Semiconductor 8390 and 83932 (SONIC)
Western Digital 83C690 Fujitsu 86950 (Etherstar)
depending on the state of and CS0 and CS1 inputs
The interface of the 82503 to the AMD 7990
(LANCE) requires external logic to control the LPBK
pin of the 82503 Note that when an AMD LAN con-
troller is used to interface to the 82503 the LPBK
pin of the 82503 becomes active high That is the
82503 enters diagnostic loopback mode when LPBK
pin is high and is in normal operation mode when
LPBK pin is low
The logic sense of the 82503 controller pins will
change and should be connected to the controller
pins according to the following table
15