GD82559ER Datasheet, PDF (67/94 Pages) Intel Corporation – PCI Controller

Networking Silicon — GD82559ER
Table 11. Power Management Driver Register
Bits
29
28:26
25
Default
0b
000b
0b
Read/Write
Description
Read/Clear
Interesting Packet. This bit is set when an “interesting” packet is
received. Interesting packets are defined by the 82559ER packet
filters. This bit is cleared by writing 1b to it.
Read Only Reserved. These bits are reserved and should be set to 000b.
Read/Clear Reserved. These bit is reserved and should be set to 0b.
24
0b
Read/Clear
PME Status. This bit is a reflection of the PME Status bit in the Power
Management Control/Status Register (PMCSR). It is set upon a wake-
up event and is independent of the PME Enable bit.
This bit is cleared by writing 1b to it. This also clears the PME Status
bit in the PMCSR and de-asserts the PME signal. I
Note: The PMDR is initialized at ALTRST# reset only.
8.1.12
General Control Register
The General Control register is a byte register and is described below.
Table 12. General Control Register
Bits
7:2
1
0
Default
000000b
0b
0b
Read/Write
Description
Read Only
Read/Write
Read/Write
Reserved. These bits are reserved and should be set to 000000b.
Deep Power-Down on Link Down Enable. If a 1b is written to this
field, the 82559ER may enter a deep power-down state (sub-3 mA) in
the D2 and D3 power states while the link is down.
In this state, the 82559ER does not keep link integrity. This state is not
supported for point-to-point connection of two end stations.
Clockrun Signal Disable. If this bit is set to 1b, then the 82559ER will
always request the PCI clock signal. This mode can be used to
overcome potential receive overruns caused by Clockrun signal
latencies over 5 µs.
8.1.13
General Status Register
The General Status register is a byte register which indicates the link status of the 82559ER.
Table 13. General Status Register
Bits
7:3
2
1
0
Default
00000b
--
--
0b
Read/Write
Description
Read Only
Read Only
Read Only
Read Only
Reserved. These bits are reserved and should be set to 00000b.
Duplex Mode. This bit indicates the wire duplex mode: full duplex (1b)
or half duplex (0b).
Speed. This bit indicates the wire speed: 100 Mbps (1b) or 10 Mbps
(0b).
Link Status Indication. This bit indicates the status of the link: valid
(1b) or invalid (0b).
Datasheet
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