GD82559ER Datasheet, PDF (45/94 Pages) Intel Corporation – PCI Controller

Networking Silicon — GD82559ER
Clock
NRZ
NRZ1
MLT-3
1100100 1
1100100 1
1100100 1
6.1.2.3
6.1.2.4
Figure 13. NRZ to MLT-3 Encoding Diagram
100BASE-TX Transmit Framing
The PHY unit does not differentiate between the fields of the MAC frame containing preamble,
Start of Frame Delimiter, data and Cyclic Redundancy Check (CRC). The PHY unit encodes the
first byte of the preamble as the “JK” symbol, encodes all other pieces of data according to the 4B/
5B lookup table, and adds the “TR” code after the end of the packet. The PHY unit scrambles and
serializes the data into a 125 Mbps stream, encodes it as MLT-3, and drives it onto the wire.
Transmit Driver
The transmit differential pair lines are implemented with a digital slope controlled current driver
that meets the TP-PMD specifications. Current is sinked from the isolation transformer by the TDP
and TDN pins. The conceptual transmit differential waveform for 100 Mbps is illustrated in the
following figure.
(V _TDP -V _TDN )
+1V
0V
t
-1V
Figure 14. Conceptual Transmit Differential Waveform
The magnetics module that is external to the PHY unit converts I_TDP and I_TDN to the 2.0 V_pp, as
required by the TP-PMD specification. The same magnetics used for 100BASE-TX mode should
also work in 10BASE-T mode. The following is a list of current magnetics modules available from
several vendors:
Table 4. Magnetics Modules
Vendor
Delta
Pulse Engineering
Pulse Engineering
Model/Type
LF8200A
PE-68515
H1012
100BASE-TX
Yes
Yes
Yes
10BASE-T
Yes
Yes
Yes
Datasheet
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