80C186EC Datasheet, PDF(40/57 Page) Intel Corporation – 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS

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80C186EC Datasheet, PDF (40/57 Pages) Intel Corporation – 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS

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80C186EC 188EC 80L186EC 188EC

DERATING CURVES

272434 â 13

Figure 14 Typical Output Delay Variations versus Load Capacitance

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Figure 15 Typical Rise and Fall Variations versus Load Capacitance

RESET

The processor will perform a reset operation any

time the RESIN pin is active The RESIN pin is syn-

chronized before it is presented internally which

means that the clock must be operating before a

reset can take effect From a power-on state RESIN

must be held active (low) in order to guarantee cor-

rect initialization of the processor Failure to pro-

vide RESIN while the device is powering up will

result in unspecified operation of the device

Figure 16 shows the correct reset sequence when

first applying power to the processor An external

clock connected to CLKIN must not exceed the VCC

threshold being applied to the processor This is nor-

mally not a problem if the clock driver is supplied

with the same VCC that supplies the processor

When attaching a crystal to the device RESIN must

remain active until both VCC and CLKOUT are stable

(the length of time is application specific and de-

pends on the startup characteristics of the crystal

circuit) The RESIN pin is designed to operate cor-

rectly using a RC reset circuit but the designer must

ensure that the ramp time for VCC is not so long that

RESIN is never sampled at a logic low level when

VCC reaches minimum operating conditions

Figure 17 shows the timing sequence when RESIN

is applied after VCC is stable and the device has

been operating Note that a reset will terminate all

activity and return the processor to a known operat-

ing state Any bus operation that is in progress at the

time RESIN is asserted will terminate immediately

(note that most control signals will be driven to their

inactive state first before floating)

While RESIN is active bus signals LOCK

A19 S16 ONCE and A18 16 are configured as in-

puts and weakly held high by internal pullup transis-

tors Only A19 ONCE can be overdriven to a low

and is used to enable the ONCE Mode Forcing

LOCK or A18 16 low at any time while RESIN is low

is prohibited and will cause unspecified device oper-

ation

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