82551IT Datasheet, PDF (35/102 Pages) Intel Corporation – Fast Ethernet PCI Controller

Networking Silicon — 82551IT
The following tables list the functionality at the different power states for the 82551IT.
Table 11. Functionality at the Different Power States
Power State
Link
Functionality
D0u
Don’t care
Valid
D0a
Invalid
Valid
D1
Invalid
Valid
D2
Invalid
Valid
D3 (with power)
Invalid
Dx (x>0 without
PME#)
Don’t care
• Power-up state
• PCI slave access
Full functionality at full power and wake on an
invalid link
Full functionality at full power and wake on a valid
link
• Wake-up on “interesting” packets and link
invalid
• PCI configuration access
• Wake on link valid
• PCI configuration access
Same functionality as D1 (link valid)
Detection for valid link and no link integrity
Same functionality as D1 (link valid)
Detection for valid link and no link integrity
No wake-up functionality.
5.3.2
Wake-up Events
There are two types of wake-up events: “Interesting” Packets and Link Status Change. These two
events are detailed below.
Note: The wake-up event is supported only if the PME Enable bit in the Power Management Control/
Status (PMCSR) register is set.
5.3.2.1
“Interesting” Packet Event
In the power-down state, the 82551IT is capable of recognizing “interesting” packets. The 82551IT
supports pre-defined and programmable packets that can be defined as any of the following:
• Address Resolution Protocol (ARP) Packets (with Multiple IP addresses)
• Direct Packets (with or without type qualification)
• Neighbor Discovery Multicast Address Packet (“ARP” in IPv6 environment)
• NetBIOS over TCP/IP (NBT) Query Packet (under IPv4)
• Internetwork Package Exchange* (IPX*) Diagnostic Packet
This allows the 82551IT to handle various packet types. In general, the 82551IT supports
programmable filtering of any packet in the first 128 bytes.
Datasheet
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