82551IT Datasheet, PDF (10/102 Pages) Intel Corporation – Fast Ethernet PCI Controller

82551IT — Networking Silicon
• Tunable transmit FIFO threshold allows elimination of underruns while concurrent transmits
are being performed.
• Extended PCI zero wait state burst accesses to and from the 82551IT for both transmit and
receive FIFOs
• Efficient re-transmission of data directly from the transmit FIFO when physical or data link
errors (collision detection or data underrun) are encountered, increasing performance by
eliminating the need to re-access the data from host memory
• Automatic discard of incoming runt receive frames
2.3
10/100 Mbps Serial CSMA/CD Unit Overview
The 82551IT’s CSMA/CD unit allows it to be connected to a 10 or 100 Mbps Ethernet network at
half or full duplex. The CSMA/CD unit performs all of the functions of the 802.3 protocol such as
frame formatting, frame stripping, collision handling, deferral to link traffic, etc.
2.4
10/100 Mbps Physical Layer Unit
The integrated Physical Layer (PHY) unit of the 82551IT allows connection to either a 10 or 100
Mbps Ethernet network. The PHY supports Auto-Negotiation for 100BASE-TX Full Duplex,
100BASE-TX Half Duplex, 10BASE-T Full Duplex, and 10BASE-T Half Duplex. Three LED
pins indicate link status, network activity, and speed.
4
Datasheet