82551IT Datasheet, PDF (16/102 Pages) Intel Corporation – Fast Ethernet PCI Controller

82551IT — Networking Silicon
Table 5. System and Power Management Signals
Symbol
Type
Name and Function
ISOLATE# IN
ALTRST#
IN
B
VIO
IN
Isolate. The Isolate pin is used to isolate the 82551IT from the PCI
bus. It also provides PCI Reset pin functionality. When Isolate is active
(low), the 82551IT does not drive its PCI outputs (except PME#) or
sample its PCI inputs (including CLK and RST#). The ISOLATE# pin
should be driven by the PCI Reset signal.
Alternate Reset. The Alternate Reset pin is used to reset the 82551IT
on power-up. The Alternate Reset signal should be pulled high to the
main digital power supply.
Voltage Input/Output. The VIO pin is the voltage bias pin and should
be connected to a 5 V supply in a 5 V PCI signaling environment and a
3.3 V supply in 3.3 V signaling environment.
4.3
Local Memory Interface Signals
Note: All unused Flash Address and Data pins MUST be left floating. Some of these pins have
undocumented test functionality and can cause unpredictable behavior if they are
unnecessarily connected to a pull-up or pull-down resistor.
Table 6. Local Memory Interface Signals
Symbol
Type
Name and Function
FLD7:0
IN/OUT
Flash Data Input/Output. These pins are used for the Flash data
interface. These pins should be left floating if the Flash is not used.
FLA16/
CLK25
IN/OUT
Flash Address 16/25 MHz Clock. This multiplexed pin is controlled
by the status of the Flash Address 7 (FLA7) pin. If FLA7 is left floating,
this pin is used as FLA16; otherwise, if FLA7 is connected to a pull-up
resistor, this pin is used as a 25 MHz clock output. This pin should be
left floating if the Flash and the CLK25 functionality are not used.
FLA15/EESK OUT
Flash Address 15/EEPROM Data Output. During Flash accesses,
this multiplexed pin acts as the Flash Address 15 output signal. During
EEPROM accesses, it acts as the serial shift clock output to the
EEPROM.
FLA14/
EEDO
IN/OUT
Flash Address 14/EEPROM Data Output. During Flash accesses,
this multiplexed pin acts as the Flash Address 14 output signal. During
EEPROM accesses, this pin accepts serial input data from the
EEPROM Data Output pin.
FLA13/EEDI OUT
Flash Address 13/EEPROM Data Input. During Flash accesses, this
multiplexed pin acts as the Flash Address 13 output signal. During
EEPROM accesses, this pin provides serial output data to the
EEPROM Data Input pin.
FLA12:8
IN/OUT
Flash Address 12:8. These pins act as Flash address outputs. They
should be left floating if Flash is not used.
FLA7/
CLKEN
IN/OUT
Flash Address 7/Clock Enable. This multiplexed pin acts as the
Flash Address 7 output signal during nominal operation. When the
power-on reset of the 82551IT is active, this pin acts as input control
over the FLA16/CLK25 output signal. If the FLA7/CLKEN pin is
connected to a pull-up resistor (3.3 K), a 25 MHz clock signal is
provided on the FLA16/CLK25 output; otherwise, it is used as FLA16
output. For systems that do not use the 25 MHz clock output or Flash,
this pin should be left floating.
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Datasheet