BX80547PG3200FSL8Q6 Datasheet, PDF (34/105 Pages) Intel Corporation – Intel® Pentium® 4 Processor 6xxΔ Sequence and Intel® Pentium® 4 Processor Extreme Edition

Electrical Specifications
2.13 GTL+ FSB Specifications
Termination resistors are not required for most GTL+ signals, as these are integrated into the
processor silicon. Valid high and low levels are determined by the input buffers that compare a
signal’s voltage with a reference voltage called GTLREF. Table 2-18 lists the GTLREF
specifications. The GTL+ reference voltage (GTLREF) should be generated on the system board
using high precision voltage divider circuits. Contact your Intel representative for further details
and documentation.
Table 2-18. GTL+Bus Voltage Definitions
Symbol
Parameter
Min
Typ
Max
Units Notes¹
GTLREF
Bus Reference
Voltage
(0.98 * 0.67) * V_TT 0.67 * V_TT (1.02 * 0.67) * V_TT V ^{2, 3, 4, 5}
On die pull-up for
R_PULLUP BOOTSELECT
500
—
5000
Ω
6
signal
R_TT
Termination
Resistance
54
60
COMP[1:0] COMP Resistance
59.8
60.4
66
Ω
7
61
Ω
8
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. The tolerances for this specification have been stated generically to enable the system designer to calculate the minimum
and maximum values across the range of V_TT.
3. GTLREF should be generated from V_TT by a voltage divider of 1% resistors or 1% matched resistors. Contact your Intel
representative for further details and documentation.
4. The V_TT referred to in these specifications is the instantaneous V_TT.
5. The Intel 915G/915GV/915GL/915P/915PL and 925X/925XE Express chipset platforms use a pull-up resistor of 100 Ω and
pull-down resistor of 210 Ω. Contact your Intel representative for further details and documentation.
6. These pull-ups are to V_TT.
7. R_TT is the on-die termination resistance measured at V_TT/2 of the GTL+ output driver.
8. COMP resistance must be provided on the system board with 1% resistors. Contact your Intel representative for further de-
tails and documentation.COMP[1:0] resistors are to V_SS.
Table 2-19. GTLREF Definition for Intel^® 945G/945P/955X Express Chipset and Intel^® E7230
Chipset Platforms
Symbol
Parameter
Min
Typ
Max
Units Notes¹
GTLREF_PU GTLREF pull-up resistor
124*0.99
124
124*1.01 Ω
GTLREF_PD GTLREF pull-down resistor
210*0.99
210
210*1.01 Ω
NOTES:
1. GTLREF is to be generated from V_TT by a voltage divider of 1% resistors (one divider for each GTLREF land). Refer to the
appropriate platform design guide for additional implementation details.
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Datasheet