BX80547PG3200FSL8Q6 Datasheet, PDF (31/105 Pages) Intel Corporation – Intel® Pentium® 4 Processor 6xxΔ Sequence and Intel® Pentium® 4 Processor Extreme Edition

Electrical Specifications
Table 2-11. GTL+ Asynchronous Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit Notes¹
V_IL Input Low Voltage
V_IH Input High Voltage
V_OH Output High Voltage
I_OL Output Low Current
I_LI
Input Leakage Current
I_LO Output Leakage Current
R_ON
Buffer On Resistance (at
1066 MHz FSB)
0.0
V_TT/2 + (0.10 * V_TT)
0.90*V_TT
—
N/A
N/A
10.5
V_TT/2 – (0.10 * V_TT)
V_TT
V_TT
V_TT/[(0.50*R_{TT_MIN}) +
R_{ON_MIN}]
± 200
± 200
14.5
V
2, 3
V ^{3, 4, 5, 6}
V
5, 6, 7
A
8
µA
9
µA
10
Ω
—
R_ON
Buffer On Resistance (at
800 MHz FSB)
8
12
Ω
—
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. V_IL is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.
3. LINT0/INTR and LINT1/NMI use GTLREF as a reference voltage. For these two signals V_IH = GTLREF + (0.10 * VTT) and
V_IL= GTLREF – (0.10 * VTT).
4. V_IH is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.
5. V_IH and V_OH may experience excursions above V_TT. However, input signal drivers must comply with the signal quality spec-
ifications.
6. The VTT referred to in these specifications refers to instantaneous V_TT.
7. All outputs are open drain.
8. The maximum output current is based on maximum current handling capability of the buffer and is not specified into the test
load.
9. Leakage to V_SS with land held at V_TT.
10. Leakage to V_TT with land held at 300 mV.
Table 2-12. GTL+ Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit Notes¹
V_IL Input Low Voltage
V_IH Input High Voltage
V_OH Output High Voltage
I_OL Output Low Current
I_LI
Input Leakage Current
I_LO Output Leakage Current
R_ON
Buffer On Resistance (at
1066 MHz FSB)
0.0
GTLREF – (0.10 * V_TT) V
GTLREF + (0.10 * V_TT)
V_TT
V
0.90*V_TT
V_TT
V
N/A
V_TT/[(0.50*R_{TT_MIN}) +
R_{ON_MIN}]
A
N/A
± 200
µA
N/A
± 200
µA
10.5
14.5
Ω
2, 3
3, 4, 5
3, 5
—
6
6
—
R_ON
Buffer On Resistance (at
800 MHz FSB)
8
12
Ω
—
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. V_IL is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.
3. The V_TT referred to in these specifications is the instantaneous V_TT.
4. V_IH is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.
5. V_IH and V_OH may experience excursions above V_TT. However, input signal drivers must comply with the signal quality spec-
ifications in.
6. Leakage to V_SS with land held at V_TT.
Datasheet
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