NQ41210SL7JE Datasheet, PDF (28/52 Pages) Intel Corporation – Intel® 41210 Serial to Parallel PCI Bridge

41210 Bridge — Datasheet
3.5
Timing Specifications
3.5.1
3.5.1.1
Table 22.
PCI Express Interface Timing
Differential Transmitter (TX) AC Output Specifications
Table 22 defines the AC specifications of parameters for the differential output at all transmitters
(TXs). The parameters are specified at the component pins.
Differential Transmitter (TX) AC Output Specifications
Symbol
UI
T_TX-EYE
T_TX-EYE-
MEDIAN-to-
MAX-JITTER
T_TX-RISE,
T_TX-FALL
T_TX-IDLE-
MIN
T_TX-IDLE-
SET-
TO-IDLE
T_TX-IDLE-
RCV-
DETECT-
MAX
L_TX-SKEW
Parameter
Unit Interval
Minimum TX Eye
Width
Maximum time
between the jitter
median and
maximum deviation
for the median
D+/D- TX Output
Rise/Fall Time
Minimum time spent
in Electrical Idle
Maximum time to
transition to a valid
Electrical Idle after
sending an Electrical
Idle ordered-set
Maximum time spent
in Electrical Idle
before initiating a
receiver detect
sequence.
Lane-to-Lane Output
Skew
Min Nom Max Units
399.88 400 400.12 ps
0.70
UI
0.125
50
0.15 UI
UI
UI
20
UI
100 ms
500 ps
Comments
Each UI is 400 ps +/-300 ppm. UI
does not account for SSC dictated
variations.
See Note 1.
The maximum transmitter jitter
can be derived as T_{TX-MAX-JITTER}
= 1 - T_TX-EYE = .3 UI
See Notes 2 and 3.
Jitter is defined as the
measurement variation of the
crossing points (V_TX-DIFFp-p = 0V)
in relation to an appropriate
average TX UI.
See Notes 2 and 3.
See Notes 2 and 4.
Minimum time a transmitter must
be in electrical idle.
After sending an electrical idle
ordered-set, the transmitter must
meet all electrical idle
specifications within this time.
Maximum time spent in Electrical
Idle before initiating a receiver
detect sequence.
Between any two Lanes within a
single Transmitter.
1. No test load is necessarily associated with this value.
2. Specified at the measurement point into a timing and voltage compliance test load as shown in Figure 2,
“Compliance Test/Measurement Load” on page 23 and measured over any 250 consecutive TX UIs. (Also
refer to the Transmitter Compliance Eye Diagram as shown in Minimum Transmitter Timing and Voltage
Output Compliance Specification.)
3. A T_TX-EYE = 0.70 UI provides for a total sum of deterministic and random jitter budget of T_{TX-JITTER-MAX} =
0.30 UI for the transmitter collected over any 250 consecutive TX UIs. The T_{TX-EYE-MEDIAN-to-MAX-JITTER}
specification ensures a jitter distribution in which the median and the maximum deviation from the median is
less than half of the total TX jitter budget collected over any 250 consecutive TX UIs. It should be noted that
the median is not the same as the mean. The jitter median describes the point in time where the number of
jitter points on either side is approximately equal as opposed to the averaged time value.
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