DD28F032SA Datasheet, PDF (27/49 Pages) Intel Corporation – 32-MBIT (2 MBIT X 16, 4 MBIT X 8) FlashFile MEMORY

E
DD28F032SA
6.5 DC Characteristics (Continued)
V_CC = 5.0V ± 0.5V, 5.0V ± 0.25V, T_A = 0°C to +70°C
3/5# Pin Set Low for 5.0V Operations
Symbol
Parameter
Notes Min Typ Max Units
Test Conditions
ICCE
ICCES
VCC Block Erase
Current
VCC Erase Suspend
Current
1,7
1,2,6,7
18 25 mA Block Erase in Progress
5
10
mA ^CE0^{#, CE}X^{# = VIH}
Block Erase Suspended
I_PPS
V_PP Standby/
1
I_PPR
Read Current
I_PPD
V_PP Deep Power-
1
Down Current
I_PPW
V_PP Prog. Current
1
for Word or Byte
± 2 ± 20
130 400
0.4 10
7 12
µA VPP ≤ VCC
µA V_PP > V_CC
µA RP# = GND ± 0.2V
mA ^VPP ^{= V}PPH
Program in Progress
I_PPE
V_PP Block Erase
1
Current
I_PPES
VPP Erase
1
Suspend Current
5
10
130 400
mA ^VPP ^{= V}PPH
Block Erase in Progress
µA ^VPP ^{= V}PPH
Block Erase Suspended
V_IL
Input Low Voltage
V_IH
Input High Voltage
–0.5
2.0
0.8
V
V_CC
V
+ 0.5
V_OL
Output Low Voltage
0.45
V V_CC = V_CC Min, I_OL = 5.8 mA
V_OH1
V_OH2
Output High
Voltage
0.85
V_CC
V_CC
– 0.4
V V_CC = V_CC Min, I_OH = –2.5 mA
V_CC = V_CC Min, I_OH = –100 µA
V_PPL
V_PP during Normal
3
0.0
Operations
6.5
V
V_PPH
V_PP during Prog.
Erase Operations
11.4 12.0 12.6 V
V_LKO
V_CC Program/Erase
2.0
V
Lock Voltage
NOTES:
1. All currents are in RMS unless otherwise noted. Typical values at V_CC = 5.0V, V_PP = 12.0V, T = +25°C. These currents are
valid for all product versions (package and speeds).
2. I_CCES is specified with the device de-selected. If the device is read while in erase suspend mode, current draw is the sum
of I_CCES and I_CCR.
3. Block erases, word/byte programs and lock block operations are inhibited when V_PP = V_PPL and not guaranteed in the
range between V_PPH and V_PPL.
4. Automatic Power Saving (APS) reduces I_CCR to <2 mA in static operation.
5. CMOS Inputs are either V_CC ± 0.2V or GND ± 0.2V. TTL Inputs are either V_IL or V_IH.
6. CE_X#= CE₁# or CE₂#.
7. If operating with TTL levels, add 4 mA of V_CC standby current. to max I_CCR1, I_CCR2, I_CCW, I_CCE and I_CCES.
8. Standby current levels are not reached when putting the chip in standby mode immediately after reading the page buffer.
Default the device into read array or read Status Register mode before entering standby to ensure standby current levels.
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