DD28F032SA Datasheet, PDF (18/49 Pages) Intel Corporation – 32-MBIT (2 MBIT X 16, 4 MBIT X 8) FlashFile MEMORY

DD28F032SA
E
5.7 Block Status Register
BS
BLS
BOS
BOAS
QS
VPPS
R
R
7
6
5
4
3
2
1
0
BSR.7 = BLOCK STATUS
1 = Ready
0 = Busy
NOTES:
[1] _{RY/BY# output or BS bit must be checked to}
determine completion of an operation (block lock,
erase suspend, any RY/BY# reconfiguration,
Upload Status Bits, block erase or data program)
before the appropriate Status bits (BOS, BLS) is
checked for success.
BSR.6 = BLOCK LOCK STATUS
1 = Block Unlocked for Program/Erase
0 = Block Locked for Program/Erase
BSR.5 = BLOCK OPERATION STATUS
1 = Operation Unsuccessful
0 = Operation Successful or
Currently Running
BSR.4 = BLOCK OPERATION ABORT STATUS
1 = Operation Aborted
0 = Operation Not Aborted
The BOAS bit will not be set until BSR.7 = 1.
MATRIX 5/4
0 0 = Operation Successful or
Currently Running
0 1 = Not a Valid Combination
1 0 = Operation Unsuccessful
1 1 = Operation Aborted
Operation halted via Abort command.
BSR.3 = QUEUE STATUS
1 = Queue Full
0 = Queue Available
BSR.2 = V_PP STATUS
1 = V_PP Low Detect, Operation Abort
0 = V_PP OK
BSR.1-0 = RESERVED FOR FUTURE ENHANCEMENTS
These bits are reserved for future use; mask them out when polling the BSRs.
NOTE:
1. When multiple operations are queued, checking BSR.7 only provides indication of completion for that particular block.
GSR.7, or CSR.7, provides indication when all queued operations are completed.
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