TDA5150 Datasheet, PDF (86/106 Pages) Infineon Technologies AG – On-chip, high resolution fractional-N synthesizer and Sigma-Delta modulator with ASK, FSK, GFSK options

TDA 5150
ADDR 0x24
TDA 5150 Functional Description
CPCFG—Charge Pump Configurations
Bit 7
n.u.
/
Bit 6
reserved
w/0
Bit 5
reserved
w/1
Bit 4
reserved
w/0
Bit 3
CPTRIM
w/0
Bit 2
CPTRIM
w/1
Bit 1
CPTRIM
w/0
Bit 0
CPTRIM
w/0
Bit <6:4> reserved
Bit <3:0> CPTRIM
Reserved
Charge pump current trimming bit <3:0>
CPTRIM
Charge pump current trimming (4-bits):
Range:
from 0x00:
current = 2.5 µA
to 0xF.
current = 40 µA
step:
2.5 µA
Note: CPTRIM bits must be set correlated with PLLBW bits, otherwise loop
instability may occur
ADDR 0x25
PLLBW— PLL Bandwidth Configuration
Bit 7
reserved
w/1
Bit 6
PLLBW
TRIM
w/1
Bit 5
PLLBW
TRIM
w/0
Bit 4
PLLBW
TRIM
w/1
Bit 3
reserved
w/1
Bit 2
reserved
w/0
Bit 1
reserved
w/0
Bit 0
reserved
w/0
Bit 7 reserved
Bit <6:4> PLLBWTRIM
Bit <3:0> reserved
reserved
Trim bandwidth of the PLL loop filter bit <2:0>
reserved
PLLBWTRIM
Trim bandwidth of the PLL loop filter (3 bits):
Range:
from 0x0:
BW = 300 kHz
to 0x7:
BW = 90 kHz
step:
30 kHz
Note: PLLBW must be set together with CPTRIM according to following table:
PLLBWTRIM [kHz] 90 120 150 180 210 240 270
CPTRIM [µA]
5
7.5 12.5 17.5 25 32.5 40
Data Sheet
86
V 1.0, July 2009