TDA5150 Datasheet, PDF (23/106 Pages) Infineon Technologies AG – On-chip, high resolution fractional-N synthesizer and Sigma-Delta modulator with ASK, FSK, GFSK options

TDA 5150
TDA 5150 Functional Description
EN
SCK
SDIO
Figure 7
SCK level sampled
tEN
t SSu
tCH
tSHo
t _IDSu
Sample
(read SDIO)
tIDHo
t_CL
Output
(write SDIO)
SPI Timing — SCK high at rising edge of EN
t_DS
tNEN
2.4.3.2 SPI XOR Checksum
The SPI block includes a safety feature for checksum calculation. This is achieved by
means of XOR operation between the address and the data during write operation of
SFR registers. The checksum is in fact the XOR of the data 8-bitwise after every 8 bits
of the SPI write command. The calculated checksum value is then automatically written
into SFR SPICHKSUM (0x00) and can be compared with the expected value.By
executing a read operation of SFR SPICHKSUM (0x00) the register content is
automatically cleared (after read). Read access to any of the other readable SFRs does
not influence the SFR SPICHKSUM.
enable every 8 bit
SPI shift register
XOR
Checksum SFR read/clear
Figure 8 Generating the Checksum of SFRs, block diagram
Example:
Write to SFR address 0x04, data 0x02, address 0x05, data 0x01
Bytes transmitted via SPI
0000 0100
0000 0010
0000 0101
0000 0001
Result in Checksum Register
0000 0100
0000 0110
0000 0011
0000 0010
After writing into the registers, content of checksum SFR SPICHKSUM (0x00) will be
0x02.
Data Sheet
23
V 1.0, July 2009