TDA5150 Datasheet, PDF (44/106 Pages) Infineon Technologies AG – On-chip, high resolution fractional-N synthesizer and Sigma-Delta modulator with ASK, FSK, GFSK options

TDA 5150
ADDR 0x1E
TDA 5150 Functional Description
GFXOSC—Gaussian Filter Configuration
Bit 7
FHBLANK
w/0
Bit 6
reserved
w/1
Bit 5
reserved
w/1
Bit 4
reserved
w/1
Bit 3
GFBYP
w/1
Bit 2
GFDIV
w/0
Bit 1
GFDIV
w/0
Bit 0
GFDIV
w/0
Bit 7 FHBLANK
Bit 3 GFBYP
Bit <2:0> GFDIV
Gaussian filter bypass
Gaussian filter divider bit <10:8>
FHBLANK
GFBYP
GFDIV
Frequency Hopping disable (defines the jump from the TX_TIMEOUT state)
0: enable (jump to TX_ON state)
1: disable (jump to PLL_ON state)
Gaussian filter bypass:
0: GF enabled
1: GF bypassed
Gaussian filter clock divider value (11 bits, bits < 10:8 >), defines the
sampling ratio of the Gaussian filter, typically this value is set such
that the GF divider is 16 x chip-rate
(for ideal Gaussian filtering)
Note: bits < 7:0> are contained in GFDIV register ADDR(0x1D)
Data Sheet
44
V 1.0, July 2009