TDA5150 Datasheet, PDF (82/106 Pages) Infineon Technologies AG – On-chip, high resolution fractional-N synthesizer and Sigma-Delta modulator with ASK, FSK, GFSK options

TDA 5150
ADDR 0x1D
TDA 5150 Functional Description
GFDIV—Gaussian Filter Divider Value
Bit 7
GFDIV
w/0
Bit 6
GFDIV
w/0
Bit 5
GFDIV
w/0
Bit 4
GFDIV
w/0
Bit 3
GFDIV
w/1
Bit 2
GFDIV
w/0
Bit 1
GFDIV
w/0
Bit 0
GFDIV
w/0
Bit <7:0> GFDIV
Gaussian filter divider bit <7:0>
GFDIV
Gaussian filter clock divider value (11 bits, bits < 7:0 >), defines the sampling ratio
of the Gaussian filter; typically this value is set such that the GF divider NGF is 16
x chip-rate (for ideal Gaussian filtering)
GFDIV = --------------^f--^X---^O----^S--^C--------------- – 1
chiprate × NGF
Note: it is recommended to program the GFDIV register in such way, that the GF divider
NGF is 16 times the chip-rate. This allows optimum Gaussian filtering.
Data Sheet
82
V 1.0, July 2009