TDA5150 Datasheet, PDF (60/106 Pages) Infineon Technologies AG – On-chip, high resolution fractional-N synthesizer and Sigma-Delta modulator with ASK, FSK, GFSK options

TDA 5150
TDA 5150 Functional Description
• B: If 0, the PA is switched off by the falling edge of the EN line. If 1, the SDIO line is
latched with the falling edge of EN, the PA stays active, continuing to transmit
according to the latched SDIO state. After a time-out duration of 65536 / f_sys (~5 ms
for a 13 MHz reference clock), both the PA and PLL are switched off if no other SPI
command starts a new transmission. This feature helps to keep the transmitter
sending, despite the fact that the EN line is pulled to Low state, normally a stop
condition for Transmitter. Pulling the EN line to (Low) in between SPI command
blocks is required by SPI protocol, if commands are not sent in burst mode.
• C: If C=0, the Encoder is not used. If C=1, the Encoder is used as configured in the
Transmitter Configuration Register 1, bits ENCMODE (0x05.2:0).
• D: Switch between two subsets of transmission parameters, referenced as
PowerLevel/Modulation Setting n. Each subset contains 3 bit-fields for control of:
– modulation type (ASK or FSK)
– RF-PA block activation (3 blocks are available, may be switched ON/OFF individually)
– RF-PA output power
– Modulation type (ASK or FSK) is controlled by bit-field ASKFSK1:2 (0x05.6:5) of the
SFR Transmitter Configuration Register 1 (0x05). The modulation type selection is
done individually for each of the two transmission settings (steered by bit D=0 or D=1),
with choice between ASK and FSK modulation. The settings are not coupled, i.e one
could be set for ASK modulation and the other for FSK for example. Further, if FSK is
chosen as modulation type, enabling of Gaussian filtering is another option - but not
mandatory. See also Chapter 2.4.4.2 SFRs related to Transmitter Configuration
and Data Encoding.
– RF-PA block activation, controlled by bit-fields PA_PS1 (0x1A.4:2) respectively
PA_PS2 (0x1A.7:5) of the SFR Output Power Configuration Register 0, (0x1A) for the
two transmission settings
– RF-PA output power selection, controlled by the bit-fields POUT1 (0x1B.3:0)
respectively POUT2 (0x1B.7:4) of the SFR Output Power Configuration Register 1,
(0x1B) for the two transmission settings
– If D=0, following fields are selected: [ASKFSK1, together with PA_PS1 and POUT1].
If D=1, following fields are selected: [ASKFSK2, together with PA_PS2 and POUT2].
• E, F RF Frequency selection as configured in PLL MM Integer Value registers
A/B/C/D (0x09/0x0D/0x11/0x15) and the PLL Fractional Division Ratio registers
A/B/C/D (0x0A:0x0C/0x0E:0x10/0x12:0x14/0x16:0x18.
After the transmit command have been sent, the SCLK line has to stay low for at least
100 µs (i.e settling time of the PLL). A rising edge of the SCLK line after this brake
activates the PA and starts the transmission. The digital data is input into the transmitter
via the SDIO line and transposed into modulated RF signal, without regard on the state
of SCLK line (which could be Low or High).
To keep crosstalk between SCLK and SDIO at minimum level, it is recommended to
keep SCLK at a steady level, instead of toggling it (usually by the uC).
Data Sheet
60
V 1.0, July 2009