TDA5150 Datasheet, PDF (43/106 Pages) Infineon Technologies AG – On-chip, high resolution fractional-N synthesizer and Sigma-Delta modulator with ASK, FSK, GFSK options

TDA 5150
TDA 5150 Functional Description
2.4.7.1 SFRs related to digital FSK / GFSK Modulator
ADDR 0x1C
FDEV—Frequency Deviation
Bit 7
Bit 6
Bit 5
FDEVSCALE FDEVSCALE FDEVSCALE
w/1
w/1
w/0
Bit 4
FDEV
w/1
Bit 3
FDEV
w/1
Bit 2
FDEV
w/1
Bit 1
FDEV
w/1
Bit 0
FDEV
w/1
Bit <7:5> FDEVSCALE
Bit <4:0> FDEV
Frequency deviation scaling bit <2:0>
Frequency deviation bit <4:0>
FDEVSCALE
FDEV
ADDR 0x1D
Scaling of the frequency deviation (3 bits)
000:
001:
010:
011:
divide by 64 divide by 32 divide by 16 divide by 8
100:
101:
110:
111:
divide by 4 divide by 2 divide by 1 multiply by2
Frequency deviation value (5 bits), defines the multiplication value for the output
data from the Gaussian filter (0-31)
GFDIV—Gaussian Filter Divider Value
Bit 7
GFDIV
w/0
Bit 6
GFDIV
w/0
Bit 5
GFDIV
w/0
Bit 4
GFDIV
w/0
Bit 3
GFDIV
w/1
Bit 2
GFDIV
w/0
Bit 1
GFDIV
w/0
Bit 0
GFDIV
w/0
Bit <7:0> GFDIV
Gaussian filter divider bit <7:0>
GFDIV
Gaussian filter clock divider value (11 bits, bits < 7:0 >), defines the sampling ratio
of the Gaussian filter; typically this value is set such that the GF divider NGF is 16
x chip-rate (for ideal Gaussian filtering)
Note: bits < 10:8> are contained in GFXOSC register ADDR(0x1E)
Data Sheet
43
V 1.0, July 2009