TDA5150 Datasheet, PDF (57/106 Pages) Infineon Technologies AG – On-chip, high resolution fractional-N synthesizer and Sigma-Delta modulator with ASK, FSK, GFSK options

TDA 5150
2.4.10
TDA 5150 Functional Description
Fail-Safe Mechanism and Status Register
2.4.10.1 Fail-Safe Flags
The status of the TDA 5150 is continuously monitored during active state. The integrated
Fail-Safe mechanism includes:
• Brownout Error—generates an internal reset, whenever the voltage drops below the
specific threshold. The brownout error flag is set, to allow recognition of a brownout
event.The flag can be red via SPI bus.
• Parity Error— There is a single parity bit for each SFR register, which is updated each
time the SFR register is written. Following this update, the parity for each register is
calculated and checked against this bit continuously. If there is a mismatch in any of
the registers, the error flag is set. The content of all SFRs is monitored and the parity
checked even during STANDBY state.
• PLL Lock Error—is monitored after the transmission start. If the PLL loses the phase-
locked state during transmission, the related flag is set.
The Fail-Safe status of the chip is stored and available via the SFR Transmitter Status
Register (0x01).If a failure condition occurs, a flag is set and latched via previously
mentioned SFR.Even if the condition which led to the event occurrence is no longer true,
the “set” state of the Fail-Safe bits is kept, and cleared only by the Transmitter Status
Register read operation. See also Chapter 2.5.2 for detailed SFR register map.
Preservation of above described Fail-Safe Flag bits in SFR Transmitter Status Register
provides a feedback to user about the failure root cause - if any error occurred.
If the Transmit Fail-Safe mechanism FSOFF in SFR TXCFG0 (0x04) is enabled (set to
1) and one of the Fail-Safe flags is set, the PA is disabled thus preventing further
transmission.
It is highly recommended to read the SFR Transmitter Status Register (0x01) before-
and after a transmission (clear error flags, if any and check for error-free transmission).
2.4.10.2 Low Battery Monitor
The low-battery detector monitors the supply voltage on Pin 5 (VBAT). If the voltage
drops below 2.4 V, a corresponding flag is set and the threshold is switched
automatically to 2.1 V. If this new threshold is also reached due to further voltage drop,
the 2.1 V flag bit is set in addition to the 2.4 V flag. These Fail-Safe flags are
automatically cleared after each transmission start, and content is not preserved like for
Brownout Error, Parity Error and PLL Lock Error bits.
Summary:
• LBD_2V4 set if battery voltage drops below 2.4 V
• LBD_2V1 set if battery voltage drops below 2.1 V
Data Sheet
57
V 1.0, July 2009