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XC161CJ_02 Datasheet, PDF (76/78 Pages) Infineon Technologies AG – 16-Bi t Single-Chip Microcontroller Preliminary
Preliminary
CLKOUT
HOLD
XC161
Derivatives
Timing Parameters
3)
tc28
tc29
HLDA
BREQ
tc29
1)
CSx, RD,
WR(L/H)
Addr, Data,
BHE
tc10|tc11
2)
tc10|tc12|tc13|tc15
Figure 22 External Bus Arbitration, (Regaining the Bus)
Notes
1) This is the last chance for BREQ to trigger the indicated regain-sequence.
Even if BREQ is activated earlier, the regain-sequence is initiated by HOLD going high.
Please note that HOLD may also be deactivated without the XC161 requesting the bus.
3) The CS outputs will be resistive high (pullup) before being driven inactive.
5) The next XC161 driven bus cycle may start here.
Data Sheet
72
V1.0, 2002-03