XC161CJ_02 Datasheet, PDF (65/78 Pages) Infineon Technologies AG – 16-Bi t Single-Chip Microcontroller Preliminary

Preliminary
5.2
External Clock Drive XTAL1
XC161
Derivatives
Timing Parameters
Table 15
External Clock Drive Characteristics
(Operating Conditions apply)
Parameter
Symbol
Limit Values Unit
min.
max.
Oscillator period
High time²⁾
Low time²⁾
Rise time²⁾
Fall time²⁾
t_OSC SR 20
t₁ SR 6
t₂ SR 6
t₃ SR –
t₄ SR –
250¹⁾
ns
–
ns
–
ns
8
ns
8
ns
1) _{The maximum limit is only relevant for PLL operation to ensure the minimum input frequency for the PLL.}
2) _{The clock input signal must reach the defined levels VILC and VIHC.}
t₁
0.5 V_DDI
t₃
t₂
t _OSC
t₄
V_IHC
V_ILC
MCT05138
Figure 14 External Clock Drive XTAL1
Note: If the on-chip oscillator is used together with a crystal or a ceramic resonator, the
oscillator frequency is limited to a range of 4 MHz to 16 MHz.
It is strongly recommended to measure the oscillation allowance (negative
resistance) in the final target system (layout) to determine the optimum
parameters for the oscillator operation. Please refer to the limits specified by the
crystal supplier.
When driven by an external clock signal it will accept the specified frequency
range. Operation at lower input frequencies is possible but is guaranteed by
design only (not 100% tested).
Data Sheet
61
V1.0, 2002-03