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XC161CJ_02 Datasheet, PDF (60/78 Pages) Infineon Technologies AG – 16-Bi t Single-Chip Microcontroller Preliminary
Preliminary
4.6
A/D Converter Characteristics
XC161
Derivatives
Electrical Parameters
Table 13
A/D Converter Characteristics
(Operating Conditions apply)
Parameter
Analog reference supply
Symbol
Limit Values
min.
max.
VAREF
4.5
SR
VDDP
+ 0.1
Unit Test
Condition
V
1)
Analog reference ground
Analog input voltage range
Basic clock frequency
Conversion time4)
Calibration time after reset
Total unadjusted error
Total capacitance
of an analog input
Switched capacitance
of an analog input
Resistance of
the analog input path
Total capacitance
of the reference input
Switched capacitance
of the reference input
Resistance of
the reference input path
VAGND VSS - 0.1
SR
VAIN
fBC
tC10
SR VAGND
0.5
–
CC
tC8
–
CC
tCAL CC 484
TUE CC –
CAINT
–
CC
CAINS
–
CC
RAIN
–
CC
CAREFT –
CC
CAREFS –
CC
RAREF
–
CC
VSS + 0.1 V
VAREF
20
V
2)
MHz 3)
48×tBC +
tS+2×tSYS
40×tBC +
tS+2×tSYS
11,696
±2
15
–
–
tBC
LSB
pF
10-bit conv.
tSYS = 1 / fCPU
8-bit conv.
tSYS = 1 / fCPU
5)
1)
6)
10
pF 6)
2
kΩ 6)
20
pF 6)
15
pF 6)
1
kΩ 6)
1) TUE is tested at VAREF = VDDP + 0.1 V, VAGND = 0 V. It is guaranteed by design for all other voltages within
the defined voltage range.
If the analog reference supply voltage drops below 4.5 V (i.e. VAREF ≥ 4.0 V) or exceeds the power supply
voltage by up to 0.2 V (i.e. VAREF = VDDP + 0.2 V) the maximum TUE is increased to ±3 LSB. This range is not
100% tested.
The specified TUE is guaranteed only if the absolute sum of input overload currents on Port 5 pins (see IOV
specification) does not exceed 10 mA.
During the reset calibration sequence the maximum TUE may be ±4 LSB.
Data Sheet
56
V1.0, 2002-03