XC161CJ_02 Datasheet, PDF (37/78 Pages) Infineon Technologies AG – 16-Bi t Single-Chip Microcontroller Preliminary

XC161
Derivatives
Preliminary
Functional Description
The CAPREL register may capture the contents of timer T5 based on an external signal
transition on the corresponding port pin (CAPIN), and timer T5 may optionally be cleared
after the capture procedure. This allows the XC161 to measure absolute time differences
or to perform pulse multiplication without software overhead.
The capture trigger (timer T5 to CAPREL) may also be generated upon transitions of
GPT1 timer T3’s inputs T3IN and/or T3EUD. This is especially advantageous when T3
operates in Incremental Interface Mode.
f_SYS
T5IN
T5EUD
2ⁿ : 1
T5
Mode
Control
GPT2 Timer T5
U/D
Clear
Capture
Interrupt
Request
(T5IR)
T3IN/
T3EUD
CAPIN
MUX
GPT2 CAPREL
CT3
f_SYS
T6IN
T6EUD
2ⁿ : 1
T6
Mode
Control
Clear
GPT2 Timer T6
U/D
n = 1 … 11
Figure 7
Block Diagram of GPT2¹⁾
Interrupt
Request
(CRIR)
Interrupt
Request
(T6IR)
Toggle FF
T6OTL
T6OUT
Other
Modules
Mcb03999_xc.vsd
1) _{The availability of pins TxEUD depends on the respective derivative.}
Data Sheet
33
V1.0, 2002-03