XC2288H_11 Datasheet, PDF (7/151 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance

XC2288H, XC2289H
XC2000 Family / High Line
Summary of Features
16/32-Bit Single-Chip Microcontroller
with 32-Bit Performance
XC228xH (XC2000 Family)
1
Summary of Features
For a quick overview and easy reference, the features of the XC228xH are summarized
here.
• High-performance CPU with five-stage pipeline and MPU
– 10 ns instruction cycle @ 100 MHz CPU clock (single-cycle execution)
– One-cycle 32-bit addition and subtraction with 40-bit result
– One-cycle multiplication (16 × 16 bit)
– Background division (32 / 16 bit) in 21 cycles
– One-cycle multiply-and-accumulate (MAC) instructions
– Enhanced Boolean bit manipulation facilities
– Zero-cycle jump execution
– Additional instructions to support HLL and operating systems
– Register-based design with multiple variable register banks
– Fast context switching support with two additional local register banks
– 16 Mbytes total linear address space for code and data
– 1,024 Bytes on-chip special function register area (C166 Family compatible)
– Integrated Memory Protection Unit (MPU)
• Interrupt system with 16 priority levels providing 112 interrupt nodes
– Selectable external inputs for interrupt generation and wake-up
– Fastest sample-rate 10 ns
• Eight-channel interrupt-driven single-cycle data transfer with
Peripheral Event Controller (PEC), 24-bit pointers cover total address space
• Clock generation from internal or external clock sources,
using on-chip PLL or prescaler
• Hardware CRC-Checker with Programmable Polynomial to Supervise On-Chip
Memory Areas
• On-chip memory modules
– 8 Kbytes on-chip stand-by RAM (SBRAM)
– 2 Kbytes on-chip dual-port RAM (DPRAM)
– 24 Kbytes on-chip data SRAM (DSRAM)
– Up to 112 Kbytes on-chip program/data SRAM (PSRAM)
– Up to 1,600 Kbytes on-chip program memory (Flash memory)
– Memory content protection through Error Correction Code (ECC)
Data Sheet
7
V1.3, 2011-07