XC2288H_11 Datasheet, PDF (143/151 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance

XC2288H, XC2289H
XC2000 Family / High Line
Electrical Parameters
DAP0
DAP1
t1 6
t1 7
Figure 30 DAP Timing Host to Device
MC_ DAP1_RX
t_{1 1}
DAP1
t1 9
MC_ DAP1_TX
Figure 31 DAP Timing Device to Host
Note: The transmission timing is determined by the receiving debugger by evaluating the
sync-request synchronization pattern telegram.
Debug via JTAG
The following parameters are applicable for communication through the JTAG debug
interface. The JTAG module is fully compliant with IEEE1149.1-2000.
Note: These parameters are not subject to production test but verified by design and/or
characterization.
Note: Operating Conditions apply.
Table 42 is valid under the following conditions: C_L= 20 pF; voltage_range= upper
Table 42 JTAG Interface Timing for Upper Voltage Range
Parameter
TCK clock period
TCK high time
Symbol
Min.
t₁ SR 50
t₂ SR 16
Values
Typ. Max.
−
−
−
−
Unit Note /
Test Condition
ns
1)
ns
Data Sheet
143
V1.3, 2011-07