XC2288H_11 Datasheet, PDF (54/151 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance

XC2288H, XC2289H
XC2000 Family / High Line
Functional Description
3.1
Memory Subsystem and Organization
The memory space of the XC228xH is configured in the von Neumann architecture. In
this architecture all internal and external resources, including code memory, data
memory, registers and I/O ports, are organized in the same linear address space.
Table 8
XC228xH Memory Map ¹⁾
Address Area
Start Loc. End Loc.
IMB register space
Reserved
Reserved for EPSRAM
Emulated PSRAM
FF’FF00_H
F0’0000_H
E9’C000_H
E8’0000_H
FF’FFFF_H
FF’FEFF_H
EF’FFFF_H
E9’BFFF_H
Reserved for PSRAM
PSRAM
E1’C000_H E7’FFFF_H
E0’0000_H E1’BFFF_H
Reserved for Flash
D9’0000_H
Flash 6
D8’0000_H
Flash 5
D4’0000_H
Flash 4
D0’0000_H
Flash 3
CC’0000_H
Flash 2
C8’0000_H
Flash 1
C4’0000_H
Flash 0
C0’0000_H
External memory area
External IO area⁴⁾
40’0000_H
21’0000_H
Reserved
20’C000_H
USIC0–3 alternate regs. 20’B000_H
MultiCAN alternate regs. 20’8000_H
FlexRay registers
20’7000_H
Reserved
20’6800_H
USIC0–4 registers
20’4000_H
MultiCAN registers
20’0000_H
External memory area 01’0000_H
SFR area
00’FE00_H
DF’FFFF_H
D8’FFFF_H
D7’FFFF_H
D3’FFFF_H
CF’FFFF_H
CB’FFFF_H
C7’FFFF_H
C3’FFFF_H
BF’FFFF_H
3F’FFFF_H
20’FFFF_H
20’BFFF_H
20’AFFF_H
20’7FFF_H
20’6FFF_H
20’67FF_H
20’3FFF_H
1F’FFFF_H
00’FFFF_H
Area Size²⁾
256 Bytes
< 1 Mbyte
400 Kbytes
up to
112 Kbytes
400 Kbytes
up to
112 Kbytes
448 Kbytes
64 Kbytes
256 Kbytes
256 Kbytes
256 Kbytes
256 Kbytes
256 Kbytes
256 Kbytes³⁾
8 Mbytes
1,984 Kbytes
16 Kbytes
4 Kbytes
12 Kbytes
4 Kbytes
2 Kbytes
10 Kbytes
16 Kbytes
1984 Kbytes
0.5 Kbytes
Notes
Minus IMB registers
Mirrors EPSRAM
With Flash timing
Mirrors PSRAM
Program SRAM
Minus res. seg.
Accessed via EBC
Accessed via EBC
Accessed via EBC
Accessed via EBC
Accessed via EBC
Data Sheet
54
V1.3, 2011-07