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XC2288H_11 Datasheet, PDF (113/151 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance
XC2288H, XC2289H
XC2000 Family / High Line
Electrical Parameters
Table 25 Flash Parameters (cont’d)
Parameter
Symbol
Values
Unit Note /
Min. Typ. Max.
Test Condition
Number of erase cycles NER SR −
−
15.000 cycle tRET≥ 5 years;
s
Valid for up to
64 user
selected
sectors (data
storage)
−
−
1.000 cycle tRET≥ 20 years
s
1) All Flash module(s) can be erased/programmed while code is executed and/or data is read from only one
Flash module or from PSRAM. The Flash module that delivers code/data can, of course, not be
erased/programmed.
2) Flash module 6 can be erased/programmed while code is executed and/or data is read from any other Flash
module.
3) Value of IMB_IMBCTRL.WSFLASH.
4) Value of IMB_IMBCTRL.WSFLE.
5) Programming and erase times depend on the internal Flash clock source. The control state machine needs a
few system clock cycles. This increases the stated durations noticably only at extremely low system clock
frequencies.
Access to the XC228xH Flash modules is controlled by the IMB. Built-in prefetch
mechanisms optimize the performance for sequential access.
Flash access waitstates only affect non-sequential access. Due to prefetch
mechanisms, the performance for sequential access (depending on the software
structure) is only partially influenced by waitstates.
Data Sheet
113
V1.3, 2011-07