BTS54040-LBF_15 Datasheet, PDF (61/67 Pages) Infineon Technologies AG – SPI Power Controller

9.7.7 Diagnosis Control Register
BTS54040-LBF
Serial Peripheral Interface (SPI)
Name W = 1 RB ADDR
3
2
1
R=0
DCR
R
1
11
DCR.SBM
DCR.MUX
W
1
11
0
DCR.MUX
0
Default
F7_H
-
9.7.8 Configuration Register Bit Overview
Field
Bits
RB
6
OUT.OUTn
4:0
n = 5 to 1
OUT.INSTn 1:0
n = 2 to 1
LGCR.LEDn 3:0
n = 4 to 1
LGCR.GBRn 3:0
n = 4 to 1
HWCR.CTC
0
HWCR.RST
1
HWCR.STB
1
HWCR.COL
2
HWCR.RCR
3
Type
rw
rw
r
rw
rw
w
w
r
rw
rw
Description
Register Bank
0_B (default) Read / write to OUT register
1_B Read / write to other registers
Output Control Register of Channel n
0_B (default) channel is OFF
1_B Channel is ON
Input Status Monitor Channel n
0_B (default) Input signal is “low”
1_B Input signal is “high”
Set LED Mode for Channel n
0_B (default) Channel n is in bulb mode
1_B Channel n is in LED mode
Gate Back Regulation for Channel n
0_B Gate back regulation for Channel n is forced OFF
1_B (default) Gate back regulation for Channel n is active
Clear Thermal Counter
0_B (default) Thermal latches are untouched
1_B Command: Clear all thermal latches
Reset Command
0_B (default) Normal operation
1_B Execute reset command
Standby Mode
0_B Device is awake
1_B (default) Device is in Standby mode
Input Combinatorial Logic Configuration
0_B (default) Input signal OR-combined with according OUT register bit¹⁾
1_B Input signal AND-combined with according OUT register bit
Retry Counter Reset
0_B (default) Retry Counter is reset only for HWCR.CTC=1 (and V_DD reset)
1_B Retry Counter is reset for every IN-pin or OUT.OUTn “high” to “low”
transition for n_retry < n_retry,max and also for HWCR.CTC=1 (and V_DD reset)
Data Sheet
61
Rev. 2.1, 2014-12-05