BTS54040-LBF_15 Datasheet, PDF (38/67 Pages) Infineon Technologies AG – SPI Power Controller

IN /
OUT.OUTn
IL
I _{L(LIM )}
BTS54040-LBF
Protection Functions
t
Internal
counter
0
1
ERR
0
2
3
1
HWCR.RCR
0 (default )
45
0
0
Figure 20 Different counter reset according to HWCR.RCR bit value
12
1
1
t
0
1
t
0
1
t
t
Protection_RCR.emf
7.3
Reverse Polarity Protection
In reverse polarity condition, power dissipation is caused by the intrinsic body diode of each DMOS channel as
well as each ESD diode of the logic pins. The reverse current through the channels has to be limited by the
connected loads.The current through ground pin GND, sense pin IS, logic power supply pin VDD, SPI pins, input
pins, external driver pins and Limp Home Input pin has to be limited as well (please refer to the maximum ratings
listed on Chapter 4.1).
Note: No protection mechanism like temperature protection or current limitation is active during reverse polarity.
7.4
Over Voltage Protection
In the case of supply voltages between V_S(SC)max and V_S(AZ) the output transistors are still operational and follow
the input or the OUT register. Parameters are not warranted and lifetime is reduced compared to nominal voltage
supply.
In addition to the output clamp for inductive loads as described in Chapter 6.4.3, there is a clamp mechanism
available for over voltage protection for the logic and all channels.
7.5
Loss of Ground
In case of complete loss of the device ground connection, but loads connected to ground, the BTS54040-LBF
securely changes to or stays in OFF-state. Please refer to Chapter 10 where an application setup is described.
7.6
Loss of V_S
In case of loss of V_S connection in ON-state, all inductances of the loads have to be demagnetized through the
ground connection or through an additional path from V_S to ground. For example, a suppressor diode is
recommended between V_S and GND.
Data Sheet
38
Rev. 2.1, 2014-12-05