BTS54040-LBF_15 Datasheet, PDF (59/67 Pages) Infineon Technologies AG – SPI Power Controller

BTS54040-LBF
Serial Peripheral Interface (SPI)
9.7
SPI Configuration Registers
The following table provides an overview on the registers available and the available addressing space.
Table 14 Register Overview
Register name Register Bank
OUT
0
OUT
0
SWCR
1
LGCR
1
LGCR
1
HWCR
1
DCR
1
Address
(na)
(na)
00
01
01
10
11
SWCR.SWR bit
0
1
(na)
0
1
(na)
(na)
Content
Output configuration
Input status
Swap configuration
LED mode configuration
Gate Back Regulation configuration
Hardware configuration
Diagnostic configuration
9.7.1 Output Configuration Register
SWCR.SWR = 0
Bit
7
6
5
4
3
2
1
0
Name W = 1 RB
5
4
3
2
1
0
Default
R=0
OUT
W/R 0
0
OUT.OUTn
80_H
9.7.2 Input Status Register
SWCR.SWR = 1
Bit
7
6
Name
W = 1 RB
R=0
OUT
R
0
5
5
LHI
4
4
1
3
3
0
9.7.3 Swap Configuration Register
2
2
0
1
0
1
0
OUT.INSTn
Default
90_H
Bit
7
6 54
3
2
Name W = 1 RB ADDR
3
2
R=0
SWCR
W/R 1
00
SWCR.SWR
1
1
1
0
0
0
0
Default
C4_H
Data Sheet
59
Rev. 2.1, 2014-12-05