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BTS54040-LBF_15 Datasheet, PDF (20/67 Pages) Infineon Technologies AG – SPI Power Controller
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BTS54040-LBF
Power Supply
5
Power Supply
The BTS54040-LBF is supplied by two voltage sources:
• VS (analog supply voltage)
• VDD (digital supply voltage)
The VS supply line is connected to a battery feed and used for the driving circuitry of the power stages, while VDD
is used for the SPI logic and for driving SO pin.
VS and VDD supply voltages have an undervoltage detection circuit, which prevents the activation of the associated
function in case the measured voltage is below the undervoltage threshold. More in detail:
• An undervoltage on VDD supply prevents SPI communication. SPI registers are reset to default values. The
retry counters used to protect the channels are reset therefore the channels are in “unlimited restart” mode.
• An undervoltage on VS supply switches OFF all channels, even in Limp Home mode. The channels are
enabled again as soon as VS = VS(OP).
The voltage at pin VS is also monitored. In case of a negative voltage transient resulting in VS < VSMON with
DCR.MUX ≠ “111B”, any SPI command sent by the micro-controller is not accepted (see Chapter 9.5 for further
details).
An overview of channel behavior according to different VS and VDD supply voltages is shown in Table 4 (the table
is valid after a successful supply voltage ramp-up).
Table 4 Device capability as function of VS and VDD
VDD ≤ VDD(PO)
(VDD(PO) = P_5.3.17)
VS ≤ VSMON
(VSMON = P_5.3.12)
Channels are OFF
SPI registers reset
VDD > VDD(PO)
Channels are OFF
SPI registers protected1)
SPI communication not available
(fSCLK = 0 MHz)
Limp Home mode not available
SPI communication available2)
(fSCLK = 3 MHz)
Limp Home mode not available
VSMON < VS ≤ VS(UV)
(VS(UV) = P_5.3.2)
Channels are OFF
SPI registers reset
Channels are OFF
SPI registers available
SPI communication not available
(fSCLK = 0 MHz)
Limp Home mode available
(channels are OFF)
SPI communication available
(fSCLK = 3 MHz)
Limp Home mode available
(channels are OFF)
VS
>
V 3)
S(UV)
Channels cannot be controlled by SPI Channels can be switched ON and
OFF
SPI registers reset
SPI registers available
SPI communication not available
(fSCLK = 0 MHz)
Limp Home mode available
SPI communication available
(fSCLK = 3 MHz)
Limp Home mode available
1) If DCR.MUX ≠ 111B, othervise SPI registers are available.
2) SPI response depends on DCR.MUX value. See Chapter 9.5 for further details.
3) The undervoltage condition on VS supply must be considered. See Chapter 5.2.1 for further details.
Data Sheet
20
Rev. 2.1, 2014-12-05
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