BTS54040-LBF_15 Datasheet, PDF (49/67 Pages) Infineon Technologies AG – SPI Power Controller

BTS54040-LBF
Serial Peripheral Interface (SPI)
9
Serial Peripheral Interface (SPI)
The serial peripheral interface (SPI) is a full duplex synchronous serial slave interface, which uses four lines: SO,
SI, SCLK and CS. Data is transferred by the lines SI and SO at the rate given by SCLK. The falling edge of CS
indicates the beginning of an access. Data is sampled in on line SI at the falling edge of SCLK and shifted out on
line SO at the rising edge of SCLK. Each access must be terminated by a rising edge of CS. A modulo 8 counter
ensures that data is taken only when a multiple of 8 bit has been transferred. The interface provides daisy chain
capability with 8-bit SPI devices.
SO
SI
CS
SCLK
time
CS MSB 6 5
4
3
2
1
LSB
MSB
65
4
3
2
1
LSB
Figure 25 Serial Peripheral Interface
SPI _8bit.emf
9.1
SPI Signal Description
CS - Chip Select
The system micro controller selects the BTS54040-LBF by means of the CS pin. Whenever the pin is in “low” state,
data transfer can take place. When CS is in “high” state, any signals at the SCLK and SI pins are ignored and SO
is forced into a high impedance state.
CS “high” to “low” Transition
• The requested information is transferred into the shift register.
• SO changes from high impedance state to “high” or “low” state depending on the signal level at pin SI.
TER
SI
OR
1
0
SI SPI ^SO
S
CS
SCLK
S
Figure 26 Combinatorial Logic for TER Flag
SO
SPI _TER.emf
Data Sheet
49
Rev. 2.1, 2014-12-05