TLE9261-3QX Datasheet, PDF (31/186 Pages) Infineon Technologies AG – Dedicated Data Sheets are available for the different product variants

TLE9261-3QX
System Features
Table 8 Reasons for Fail-Safe - State of SPI Status Bits after Return to Normal Mode
Prev. SBC Failure Event
Mode
DEV_
STAT
TSD2 WD_
FAIL
VCC1_ VCC1_ VCC1_
UV
UV_FS OV
Normal 1 x Watchdog Failure 01
x
01
x
x
x
Normal 2 x Watchdog Failure 01
x
10
x
x
x
Normal TSD2
01
1
xx
x
x
x
Normal VCC1 short to GND 01
x
xx
1
x
x
Normal 4x VCC1 UV
01
x
xx
1
1
x
Normal VCC1 over voltage 01
x
xx
x
x
1
Stop
1 x Watchdog Failure 01
x
01
x
x
x
Stop
2 x Watchdog Failure 01
x
10
x
x
x
Stop
TSD2
01
1
xx
x
x
x
Stop
VCC1 short to GND 01
x
xx
1
x
x
Stop
4x VCC1 UV
01
x
xx
1
1
x
Stop
VCC1 over voltage 01
x
xx
x
x
1
VCC1_
SC
x
x
x
1
x
x
x
x
x
1
x
x
Note: An over voltage event on VCC1 will only lead to SBC Fail-Safe Mode if the bit VCC1_OV_RST is set and if
CFGP = ‘0’ (Config 2/4).
Note: The content of the WD_FAIL bits will depend on the device configuration, e.g. 1 or 2 watchdog failures.
Note: See Chapter 14.6.1 for detailed description of the 4x VCC1 under voltage behavior.
5.1.7 SBC Development Mode
The SBC Development Mode is used during the development phase of the module. It is especially useful for
software development.
Compared to the default SBC user mode operation, this mode is a super set of the state machine. The device will
start also in SBC Init Mode and it is possible to use all the SBC Modes and functions with following differences:
• Watchdog is stopped and does not need to be triggered. Therefore no reset is triggered due to watchdog failure
• SBC Fail-Safe and SBC Restart Mode are not reached due to watchdog failure but the other reasons to enter
these modes are still valid
• CAN and VCC2 default value in SBC INIT MODE and entering SBC Normal Mode from SBC Init Mode is ON
instead of OFF
The SBC Software Development Mode is reached automatically if the FO3/TEST pin is set and kept LOW during
SBC Init Mode. The voltage level monitoring is started as soon as VS > V_POR,f. The Software Development Mode
is configured and maintained if SBC Init Mode is left by sending any SPI command while FO3/TEST is LOW. In
case the FO3/TEST level will be HIGH for longer than t_TEST during the monitoring period then the SBC
Development Mode is not reached .
The SBC will remain in this mode for all conditions and can only be left by powering down the device
(VS < V_POR,f).
Data Sheet
31
Rev. 1.1, 2014-09-26