TLE9261-3QX Datasheet, PDF (160/186 Pages) Infineon Technologies AG – Dedicated Data Sheets are available for the different product variants

TLE9261-3QX
Serial Peripheral Interface
15.6
SPI Status Information Registers
READ/CLEAR Operation (see also Chapter 15.3):
• One 16-bit SPI command consist of two bytes:
- the 7-bit address and one additional bit for the register access mode and
- following the data byte
The numbering of following bit definitions refers to the data byte and correspond to the bits D0...D7 and to the
SPI bits 8...15 (see also figure).
• There are two different bit types:
- ‘r’ = READ: read only bits (or reserved bits)
- ‘rc’ = READ/CLEAR: readable and clearable bits
• Reading a register is done byte wise by setting the SPI bit 7 to “0” (= Read Only)
• Clearing a register is done byte wise by setting the SPI bit 7 to “1”
• SPI status registers are in general not cleared or changed automatically (an exception are the WD_FAIL bits).
This must be done by the microcontroller via SPI command
The registers are addressed wordwise.
Data Sheet
160
Rev. 1.1, 2014-09-26