TLE9261-3QX Datasheet, PDF (102/186 Pages) Infineon Technologies AG – Dedicated Data Sheets are available for the different product variants

TLE9261-3QX
Fail Outputs
• FO3: 100Hz PWM, 20% (typ.) duty cycle, e.g. to generate a dimmed rear light from a break light.
Note: The duty cycle for FO3 can be configured via SPI option to 20%, 10%, 5% or 2.5%. Default value is 20%.
See the register FO_DC for configuration.
13.1.1 General Purpose I/O Functionality of FO2 and FO3 as Alternate Function
In case that FO2 and FO3 are not used in the application, those pins can also be configured with an alternate
function as high-voltage (VSHS related) General Purpose I/O pins.
VSHS
Config &
Control Logic
FOx/
GPIOx
Figure 44 Simplified General Purpose I/O block diagram for FO2 and FO3/TEST
The pins are by default configured as FO pins. The configuration is done via the SPI register GPIO_CTRL. The
alternate function can be:
• Wake Inputs: The detection threshold V_GPIOI,th is similar as for the WK inputs. The wake-up detection behavior
is the same as for WKx pins. Wake events are stored and reported in WK_STAT_2.
• Low-Side Switches: The switch is able to drive currents of up to 10mA (see also V_GPIOL,L1). It is self-protected
with regards to current limitation. No other diagnosis is implemented.
• High-Side Switches: The switch is able to drive currents up to 10mA (see also V_GPIOH,H1). It is self-protected
with regards to current limitation. No other diagnosis is implemented.
• If configured as GPIO then the respective level at the pin will be shown in WK_LVL_STAT in SBC Normal and
Stop Mode. This is also the case if configured as LS/HS and can serve as a feedback about the respective
state. GPIO2 is shared with the TEST level bit.
Figure 45 describes the behavior of the FO/GPIO pins in their different configurations and SBC modes.
Function
FOx
WK
HS
LS
Normal Mode
configurable
Stop Mode
keeps the state
wake capable
as configured in Normal Mode
as configured in Normal Mode
Sleep Mode
keeps the state
wake capable
OFF
OFF
Fail-Safe Mode
active
OFF
OFF
OFF
Figure 45 FO / GPIO behavior for the respective SBC modes
Note: In order to avoid unintentional entry of SBC Development Mode care must be taken that the level of
FO3/TEST is HIGH during device power up and SBC Init Mode.
Note: The FOx drivers are supplied via VS. However, the GPIO HS switches (FO2, FO3/TEST) are supplied by
VSHS
Data Sheet
102
Rev. 1.1, 2014-09-26