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TLE9261-3QX Datasheet, PDF (113/186 Pages) Infineon Technologies AG – Dedicated Data Sheets are available for the different product variants
TLE9261-3QX
Supervision Functions
VCC1
VRTx
t
tRF
tRD1
RO
SBC Normal
SBC Restart
Figure 52 VCC1 Under Voltage Timing Diagram
t
SBC Normal
An additional safety mechanism is implemented to avoid repetitive VCC1 under voltage resets due to high dynamic
loads on VCC1:
• A counter is increased for every consecutive VCC1 under voltage event (regardless on the selected reset
threshold),
• The counter is active in SBC Init-, Normal-, and Stop Mode,
• For VS < VS,UV the counter will be stopped in SBC Normal Mode (i.e. the VS UV comparator is always enabled
in SBC Normal Mode),
• A 4th consecutive VCC1 under voltage event will lead to SBC Fail-Safe Mode entry and to setting the bit
VCC1_UV _FS
• This counter is cleared:
– when SBC Fail-Safe Mode is entered,
– when the bit VCC1_UV is cleared,
– when a Soft Reset is triggered.
Note: It is recommended to clear the VCC1_UV bit once it was set and detected.
14.6.2 VCC1 Over Voltage
For fail-safe reasons a configurable VCC1 over voltage detection feature is implemented. It is active in SBC Init-,
Normal-, and Stop Mode.
In case the VCC1,OV,r threshold is crossed, the SBC triggers following measures depending on the configuration:
• The bit VCC1_ OV is always set;
• If the bit VCC1_OV_RST is set and CFGP = ‘1’, then SBC Restart Mode is entered. The FOx outputs are
activated. After the reset delay time (tRD1), the SBC Restart Mode is left and SBC Normal Mode is resumed
even if the VCC1 over voltage event is still present (see also Figure 53). The VCC1_OV_RST bit is cleared
automatically;
• If the bit VCC1_OV_RST is set and CFGP = ‘0’, then SBC Fail-Safe Mode is entered and FOx outputs are
activated.
Note: In case the VCC1 output current in SBC STOP Mode is below the active peak threshold (IVCC1,Ipeak) it should
be considered to clear the bit VCC1_OV_RST before entering SBC Stop Mode to avoid unintentional SBC
Restart or Fail-Safe Mode entry and to ignore the VCC1_ OV bit due to external noise.
Data Sheet
113
Rev. 1.1, 2014-09-26