TC1765 Datasheet, PDF (26/88 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1765
Preliminary
and reception of data are double-buffered. A 16-bit baud rate generator provides the
SSC with a separate serial clock signal.
Features:
• Master and slave mode operation
– Full-duplex or half-duplex operation
• Flexible data format
– Programmable number of data bits: 2-bit to 16 bit
– Programmable shift direction: LSB or MSB shift first
– Programmable clock polarity: idle low or high state for the shift clock
– Programmable clock/data phase: data shift with leading or trailing edge of the shift
clock
• Baud rate generation from 20 Mbit/s to 305.18 Bit/s (@ 40 MHz module clock)
• Interrupt generation
– On a transmitter empty condition
– On a receiver full condition
– On an error condition (receive, phase, baud rate, transmit error)
• Three-pin interface
– Flexible SSC pin configuration
• 4-stage receive FIFO (RXFIFO) and 4-stage transmit FIFO (TXFIFO)
– Independent control of RXFIFO and TXFIFO
– 2 to 16 bit FIFO data width
– Programmable receive/transmit interrupt trigger level
– Receive and transmit FIFO filling level indication
– Overrun error generation
– Underflow error generation
Data Sheet
22
V1.2, 2002-12