TC1765 Datasheet, PDF (17/88 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1765
Preliminary
Table 1
Symbol
P5
P5.0
P5.1
P5.2
P5.3
P5.4
TP
TP.0
TP.1
TP.2
TP.3
TP.4
TP.5
TP.6
TP.7
TP.8
TP.9
TP.10
TP.11
TP.12
TP.13
TP.14
TP.15
TRST⁷⁾
TCK⁷⁾
TDI⁸⁾
Pin Definitions and Functions (cont’d)
Pin In Functions
Out
I/O Port 5⁶⁾
Port 5 is a 5-bit bidirectional general purpose I/O port which
also serves as input or output for ASC1 and SSC1.
D12 I/O RXD1
ASC1 receiver input/output
I DMREQ0C DMA request input 0C
B13 O TXD1
ASC1 transmitter output
I DMREQ1C DMA request input 1C
B14 I/O SCLK1
SSC1 clock input/output
C11 I/O MRST1
SSC1 master receive input /
SSC1 slave transmit output
A16 I/O MTSR1
SSC1 master transmit output /
SSC1 slave receive input
O OCDS-2 Trace Port³⁾
TP is the OCDS Level 2 Trace Port. The Trace port is only
available in the TC1765T. The TP outputs are tristated during
reset and deep sleep mode.
G7 O Trace output 0
G8 O Trace output 1
H7 O Trace output 2
H8 O Trace output 3
L7 O Trace output 4
L8 O Trace output 5
M7 O Trace output 6
M8 O Trace output 7
M11 O Trace output 8
M12 O Trace output 9
L11 O Trace output 10
L12 O Trace output 11
H11 O Trace output 12
H12 O Trace output 13
G11 O Trace output 14
G12 O Trace output 15
R14 I
JTAG Module Reset/Enable Input
A low level at this pin resets and disables the JTAG module.
A high level enables the JTAG module.
T13 I JTAG Module Clock Input
T14 I JTAG Module Serial Data Input
Data Sheet
13
V1.2, 2002-12