ICS1893AFLF Datasheet, PDF (88/136 Pages) Integrated Device Technology – 3.3-V 10Base-T/100Base-TX Integrated PHYceiver™

ICS1893AF Data Sheet - Release
Chapter 8 Management Register Set
8.12.1 Data Rate (bit 17.15)
The Data Rate bit indicates the ‘selected technology’. If the ICS1893AF is in:
• Hardware mode, the value of this bit is determined by the 10/100SEL input pin.
• Software mode, the value of this bit is determined by the Data Rate bit 0.13.
When bit 17.15 is logic:
• Zero, it indicates that 10-MHz operations are selected.
• One, the ICS1893AF is indicating that 100-MHz operations are selected.
Note: This bit does not imply any link status.
8.12.2 Duplex (bit 17.14)
The Duplex bit indicates the ‘selected technology’. If the ICS1893AF is in:
• Hardware mode, the value of this bit is determined by the DPXSEL input pin.
• Software mode, the value of this bit is determined by the Duplex Mode bit 0.8.
When bit 17.14 is logic:
• Zero, it indicates that half-duplex operations are selected.
• One, the ICS1893AF is indicating that full-duplex operations are selected.
Note: This bit does not imply any link status.
ICS1893AF, Rev D 10/26/04
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
88
October, 2004