ICS1893AFLF Datasheet, PDF (123/136 Pages) Integrated Device Technology – 3.3-V 10Base-T/100Base-TX Integrated PHYceiver™

ICS1893AF Data Sheet - Release
Chapter 10 DC and AC Operating Conditions
10.5.10 100M / MII Media Independent Interface: Transmit Latency
Table 10-17 lists the significant time periods for the MII / 100 Stream Interface transmit latency. The time
periods consist of timings of signals on the following pins:
• TXEN
• TXCLK
• TXD (that is, TXD[3:0])
• TP_TX (that is, TP_TXP and TP_TXN)
Figure 10-11 shows the timing diagram for the time periods.
Table 10-17. MII / 100M Stream Interface Transmit Latency
Time
Period
Parameter
Conditions
t1 TXEN Sampled to MDI Output of First MII mode
Bit of /J/ †
Min. Typ. Max. Units
– 2.8 3 Bit times
† The IEEE maximum is 18 bit times.
Figure 10-11. MII / 100M Stream Interface Transmit Latency Timing Diagram
TXEN
TXCLK
TXD
Preamble /J/ Preamble /K/
TP_TX^†
t1
† _Shown
unscrambled.
ICS1893AF, Rev. D 10/26/04
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
123
October, 2004