ICS1893AFLF Datasheet, PDF (14/136 Pages) Integrated Device Technology – 3.3-V 10Base-T/100Base-TX Integrated PHYceiver™

ICS1893AF Data Sheet - Release
Chapter 3 Typical ICS1893AF Applications
Chapter 3 Typical ICS1893AF Applications
The ICS1893AF is configured for the majority of single Phy Ethernet applications. These applications
include Network Interface Cards, PC Motherboards, Printers, ACR Riser cards, Set top Boxes, and Game
machines.
Virtually any single Phy application utilizing the standard IEEE MII interface can use the ICS1893AF. The
ICS1893AF offers the same high performance at a lower cost.
Table 3-1. ICS1893AF / ICS1893Y-10 Feature Set Comparison Table
Feature
Package Type
Pin Count
NOD/REP
HW/SW
MII/SI
10/100
DPXSEL
ANSEL
LSTA
LOCK
TXER
ICS1893AF
ICS1893Y-10
Comment
SSOP 300mil
TQFP 10x10x1.0
48
64
NOD/REP pin
NOD/REP
removed tied internally
to VSS
ICS1893AF configured in
NODE mode only.
MII/SI pin removed MII/SI
tied internally to VDD
ICS1893AF configured in
software mode only.
SI/MII pin removed SI/MII
tied internally to VSS
ICS1893AF supports only MII
interface to MAC.
10/100 pin is output
only
10/100
The 10/100 pin in software
mode is an output indicating
100M operation when high.
DPXSEL pin removed DPXSEL
FD/HD information is
available in the Quick Poll
Status Register Reg 17.
DPXSEL pin removed ANSEL
ANSEL in software mode is
an output. This information is
available in control Reg 0,
Default setting is A-N
enabled.
LSTA pin removed
LSTA
Link status available on P2LI
led
LOCK pin removed LOCK
Link status available on P2LI
led
TXER pin removed TXER
tied internally to VSS
TXER function is still
available by using control
Reg
3.1 The following bullet items describe ICS1893AF pin differences and how they affect
the application:
• The ICS1893AF is hardwired for the predominate board application used in the vast majority of single
Phy applications:
ICS1893AF, Rev D 10/26/04
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
14
October, 2004