ICS1893AFLF Datasheet, PDF (37/136 Pages) Integrated Device Technology – 3.3-V 10Base-T/100Base-TX Integrated PHYceiver™

ICS1893AF Data Sheet - Release
Chapter 7 Functional Blocks
7.2.2 Auto-Negotiation: Parallel Detection
The ICS1893AF supports parallel detection. It is therefore compatible with networks that do not support the
auto-negotiation process. When enabled, the Auto-Negotiation sublayer can detect legacy 10Base-T link
partners as well as 100Base-TX link partners that do not have an auto-negotiation capability.
The Auto-Negotiation sublayer performs this parallel detection function when it does not get a response to
its FLP bursts. In these situations, the Auto-Negotiation sublayer performs the following steps:
1. It sets the LP_AutoNeg_Able bit (bit 6.0) to logic zero, thereby identifying the remote link partner as not
being capable of executing the auto-negotiation process.
2. It sets the bit in the Auto-Negotiation Link Partner Abilities Register that corresponds to the ’parallel
detected’ technology [for example, half-duplex, 10Base-T (bit 5.5) or half-duplex, 100Base-TX (bit
5.7)].
3. It sets the Status Register’s Auto-Negotiation Complete bit (bit 1.5) to logic one, indicating completion
of the auto-negotiation process.
4. It enables the detected link technology and disables the unused technologies.
A remote link partner that does not support the auto-negotiation process does not respond to the
transmitted FLP bursts. The ICS1893AF detects this situation and responds according to the data it
receives. The ICS1893AF can receive one of five potential responses to the FLP bursts it is transmitting:
FLP bursts, 10Base-T link pulses (that is, Normal Link Pulses), scrambled 100Base IDLEs, nothing, or a
combination of signal types.
A 10Base-T link partner transmits only Normal Link Pulses when idle. When the ICS1893AF receives
Normal Link Pulses, it concludes that the remote link partner is a device that can use only 10Base-T
technology. A 100Base-TX node without an Auto-Negotiation sublayer transmits 100M scrambled IDLE
symbols in response to the FLP bursts. Upon receipt of the scrambled IDLEs, the ICS1893AF concludes
that its remote link partner is a 100Base-TX node that does not support the auto-negotiation process. For
both 10Base-T and 100Base-TX nodes without an Auto-Negotiation sublayer, the ICS1893AF clears bit 6.0
to logic zero, indicating that the link partner cannot perform the auto-negotiation process.
If the remote link partner responds to the FLP bursts with FLP bursts, then the link partner is a 100Base-TX
node that can support the auto-negotiation process. In this case, the ICS1893AF sets to logic one the
Auto-Negotiation Expansion Register’s Link Partner Auto-Negotiation Ability bit (bit 6.0).
If the Auto-Negotiation sublayer does not receive any signal when monitoring the receive channel, then the
QuickPoll Detailed Status Register’s Signal Detect bit (bit 17.3) is set to logic one, indicating that no signal
is present.
Another possibility is that the ICS1893AF senses that it is receiving multiple technology indications. In this
situation, the ICS1893AF cannot determine which technology to enable. It informs the STA of this problem
by setting to logic one the Auto-Negotiation Expansion Register’s Parallel Detection Fault bit (bit 6.4).
7.2.3 Auto-Negotiation: Remote Fault Signaling
If the remote link partner detects a fault, the ICS1893AF reports the remotely detected fault to the STA by
setting to logic one the Remote Fault Detected bit(s), 1.4, 5.13, 17.1, and 19.13. In general, the reception
of a remote fault means that the remote link partner has a problem with the integrity of its receive channel.
Similarly, if the ICS1893AF detects a link fault, it transmits a remote fault-detected condition to its remote
link partner. In this situation, the ICS1893AF sets to logic one the Auto-Negotiation Link Partner Ability
Register’s Remote Fault Indication bit (bit 4.13).
For details, see Section 8.14.3, “Remote Fault (bit 19.13)” and Section 8.3.9, “Remote Fault (bit 1.4)”.
ICS1893AF, Rev. D 10/26/04
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
37
October, 2004