ICS1893AFLF Datasheet, PDF (107/136 Pages) Integrated Device Technology – 3.3-V 10Base-T/100Base-TX Integrated PHYceiver™

ICS1893AF Data Sheet - Release
Chapter 9 Pin Diagram, Listings, and Descriptions
Table 9-8. MAC/Repeater Interface Pins: Media Independent Interface (MII) (Continued)
Pin
Name
RXD0,
RXD1,
RXD2,
RXD3
RXDV
RXER
Pin
Number
31,
30,
29,
28
32
35
Pin
Type
Output
Output
Output
Pin Description
Receive Data 0–3.
• RXD0 is the least-significant bit and RXD3 is the most-significant bit of
the MII receive data nibble.
• While the ICS1893AF asserts RXDV, the ICS1893AF transfers the
receive data signals on the RXD0–RXD3 pins to the MAC/Repeater
Interface synchronously on the rising edges of RXCLK.
Receive Data Valid.
The ICS1893AF asserts RXDV to indicate to the MAC/repeater that data
is available on the MII Receive Bus (RXD[3:0]). The ICS1893AF:
• Asserts RXDV after it detects and recovers the Start-of-Stream
delimiter, /J/K/. (For the timing reference, see Chapter 10.5.6,
“100M/MII Media Independent Interface: Synchronous Receive
Timing”.)
• De-asserts RXDV after it detects either the End-of-Stream delimiter
(/T/R/) or a signal error.
Note: RXDV is synchronous with the Receive Data Clock, RXCLK.
Receive Error.
When the MAC/Repeater Interface is in:
• 10M MII mode, RXER is not used.
• 100M MII mode, the ICS1893AF asserts a signal on the RXER pin
when either of the following two conditions are true:
– Errors are detected during the reception of valid frames
– A False Carrier is detected
Note:
1. An ICS1893AF asserts a signal on the RXER pin upon detection of a
False Carrier so that repeater applications can prevent the
propagation of a False Carrier.
2. The RXER signal always transitions synchronously with RXCLK.
3. The signal on RXER pin is conditioned by the RXTRI pin.
TXCLK
37
Output Transmit Clock.
The ICS1893AF generates this clock signal to synchronize the transfer of
data from the MAC/Repeater Interface to the ICS1893AF. When the
mode is:
• 10Base-T, the TXCLK frequency is 2.5 MHz.
• 100Base-TX, the TXCLK frequency is 25 MHz.
ICS1893AF, Rev. D 10/26/04
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
107
October, 2004