ICS1893AFLF Datasheet, PDF (128/136 Pages) Integrated Device Technology – 3.3-V 10Base-T/100Base-TX Integrated PHYceiver™

ICS1893AF Data Sheet - Release
Chapter 10 DC and AC Operating Conditions
10.5.15 Reset: Power-On Reset
Table 10-22 lists the significant time periods for the power-on reset. The time periods consist of timings of
signals on the following pins:
• VDD
• TXCLK
Figure 10-16 shows the timing diagram for the time periods.
Table 10-22. Power-On Reset Timing
Time
Period
Parameter
t1 VDD ≥ 2.7 V to Reset Complete
Conditions Min. Typ. Max. Units
–
40 45 500 ms
Figure 10-16. Power-On Reset Timing Diagram
VDD
2.7 V
t1
TXCLK
Valid
ICS1893AF, Rev D 10/26/04
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
128
October, 2004