STAC9752A Datasheet, PDF (73/106 Pages) Integrated Device Technology – AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK

STAC9752A/9753A
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
PC AUDIO
Reg
NAME
FUNCTION
Location
68h Function Information
Includes information about Gain, Inversion, Buffer delays,
Information Validity, and Function Information presence.
7.4.5: page75
Includes information about the connector/jack location, Input verses
6Ah
Sense Register
Output sensing, the Order of the sense results, and the IDT specific 7.4.7: page78
sense results.
6Ch
Reserved
6Eh
Reserved
7.4.1.
CODEC Class/Rev (60h Page 01h)
Register 24h must be set to Page 01h to access this register.
Default: 12xxh
D15
D14
D13
Reserved
D7
D6
D5
RV7
RV6
RV5
Bit(s) Reset Value
15-13
Name
Reserved
12-8
CL4:CL0
7-0
RV7:RV0
D12
D11
D10
D9
D8
CL4
CL3
CL2
CL1
CL0
D4
D3
D2
D1
D0
RV4
RV3
RV2
RV1
RV0
Description
Reserved -NOT DEFINED
CODEC Compatibility Class (RO)
This is a CODEC vendor specific field to define software compatibility for
the CODEC. Software reads this field, together with CODEC vendor ID
(reg 7C-7Eh), to determine vendor specific programming interface
compatibility. Software can rely on vendor specific register behavior to be
compatible among vendor CODECs of the same class.
00h - Field not implemented
01h-1Fh - Vendor specific compatibility class code
Equals Vendor ID2(Reg 7Eh) bits D7 to D0
Revision ID: (RO)
This register specifies a device specific revision identifier. The value is
chosen by the vendor. Zero is an acceptable value. This field should be
viewed as a vendor defined extension to the CODEC ID. This number
changes with new CODEC stepping of the same CODEC ID.
7.4.2.
PCI SVID (62h Page 01h)
Register 24h must be set to Page 01h to access this register.
Default: FFFFh
D15
PVI15
D7
PVI7
D14
PVI14
D6
PVI6
D13
PVI13
D5
PVI5
D12
PVI12
D4
PVI4
D11
PVI11
D3
PVI3
D10
PVI10
D2
PVI2
D9
PVI9
D1
PVI1
D8
PVI8
D0
PVI0
IDT™
73
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
STAC9752A/9753A
V 1.5 1206