STAC9752A Datasheet, PDF (63/106 Pages) Integrated Device Technology – AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK

STAC9752A/9753A
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
PC AUDIO
Bit(s) Reset Value
1
1
0
1
Name
DAC
ADC
Read Only ---- DAC Status
1 = DAC ready to playback
Read Only ---- ADC Status
1 = ADC ready to record
Description
7.1.18.1. Ready Status
The lower half of this register is read only status, a 1 indicating that each subsection is ready. Ready
is defined as the subsection's ability to perform in its nominal state. When this register is written, the
bit values that come in on AC-Link will have no effect on read-only bits 0-7.
When the AC-Link “CODEC Ready” indicator bit (SDATA_IN slot 0, bit 15) is a 1, it indicates that the
AC-Link and AC'97 control and status registers are in a fully operational state. The AC'97 controller
must further probe this PowerdownControl/Status Register to determine exactly which subsections,
if any, are ready. When this register is written, the bit values that come in on AC-Link will have no
effect on read-only bits 0-7.
7.1.18.2. Powerdown Controls
The STAC9752A/9753A is capable of operating at reduced power when no activity is required. The
power-down state is controlled by the Powerdown Register (26h). See the section “Low Power
Modes” for more information.
7.1.18.3. External Amplifier Power Down Control Output
The EAPD bit (bit 15 of the Powerdown Control/Status Register (Index 26h)), directly controls the
EAPD output, pin 45, and produces a logical 1 when this bit is set to logic high. This function is used
to control an external audio amplifier power-down. EAPD= 0 places approximately 0V on the output
pin, enabling an external audio amplifier. EAPD=1 places approximately DVdd on the output pin,
disabling the external audio amplifier. Audio amplifiers that operate with reverse polarity will likely
require an external inverter to maintain software driver compatibility.
EAPD can also act as a GPIO. See Section 7.4.11: page82. The GPIO controls in Section 7.2:
page68 have no effect on EAPD.
7.1.19.
Extended Audio ID (28h)
Default: 0A05h
D15
D14
ID1
ID0
D7
D6
Reserved
D13
D5
DSA1
D12
D11
Reserved
D4
D3
DSA0
RESVD
D10
D2
SPDIF
D9
AMAP
D1
RSVD
D8
RSVD
D0
VRA
The Extended Audio ID register is a read-only register except for bits D4 and D5. ID1 and ID0 echo
the configuration of the CODEC as defined by the programming of pins 45 and 46 externally. “00”
returned defines the CODEC as the primary CODEC, while any other code identifies the CODEC as
IDT™
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AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
STAC9752A/9753A
V 1.5 1206