IC42S8200 Datasheet, PDF (75/76 Pages) Integrated Circuit Solution Inc – 1Meg x 8 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM

1+" 5& 
Read Cycle, Write Cycle / Burst Read, Single Write
T0
T1
T2
T3
CLK
tCKS
CKE
tCS
CS
RAS
tCHI
tCK
tCL
tCKA
tCH
tCS
tCH
CAS
WE
A0-A9
tCS
tCH
tCS
tCH
tAS
tAH
ROW
tAS
tAH
A10
ROW
tAS
tAH
A11
BANK 1
BANK 0
DQM
I/O
tRC
tRAS
tRC
<ACT>
CAS latency = 3, burst length = 2
T4
T5
T6
T7
T8
T9 T10
T11 T12
(1)
COLUMN m
NO PRE
BANK 1
BANK 0
tCS
tCAC
tQMD
tAC
tAC
tOH
tOH
DOUT m
DOUT m+1
tLZ
tHZ
<READ>
(1)
COLUMN n
AUTO PRE
NO PRE
BANK 1
BANK 0
tCH
tDS
tDH
DIN n
tDPL
<WRIT>
<WRITA>
BANK 0 AND 1
BANK 0 OR 1
BANK 1
BANK 0
tRP
<PRE>
<PALL>
Undefined
Don’t Care
Note 1: A8,A9 = Don't Care.
Integrated Circuit Solution Inc.
75
DR018-0A 07/10/2001