IC42S8200 Datasheet, PDF (61/76 Pages) Integrated Circuit Solution Inc – 1Meg x 8 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM

1+" 5& 
Read Cycle / .ull Page
T0
T1
T2
CLK
tCKS
CKE
tCS
CS
RAS
tCHI
tCK
tCL
tCKA
tCH
tCS
tCH
CAS
WE
A0-A9
tCS
tCH
tCS
tCH
tAS
tAH
ROW
tAS
tAH
A10
ROW
tAS
tAH
A11
BANK 0
DQM
T3
T4
T5
(1)
COLUMN
NO PRE
BANK 0
tCS
I/O
tRCD
(BANK 0)
tRAS
(BANK 0)
tRC
(BANK 0)
<ACT 0>
tCAC
(BANK 0)
<READ0>
CAS latency = 3, burst length = full page
T6
T7
T8
T262 T263 T264 T265
BANK 0 OR 1
BANK 0
tCH
tAC
tLZ
tAC
tOH
DOUT 0m
tAC
tOH
DOUT 0m+1
tAC
tOH
DOUT 0m-1
tRBD
tAC
tOH
DOUT 0m
tOH
DOUT 0m+1
tHZ
tRP
(BANK 0)
<BST> <PRE 0>
Undefined
Don’t Care
Note 1: A8,A9 = Don't Care.
Integrated Circuit Solution Inc.
61
DR018-0A 07/10/2001